標題: 16通道癲癇偵測晶片之設計與實現
Design and Implementation of a 16-Channel Epileptic Seizure Detection Chip
作者: 陳威宏
Chen, Wei-Hung
李鎮宜
Lee, Chen-Yi
電子工程學系 電子研究所
關鍵字: 癲癇偵測;傅立葉轉換;近似熵;數位訊號處理;seizure detection;fast Fourier transform;approximate entropy;digital signal processing
公開日期: 2015
摘要: 近幾年來,因為百分之三十的癲癇病人存在著抗藥性,而只有部分病人適合做切除手術,癲癇發作的控制是個受矚目的議題。多通道偵測癲癇也是一個重要的議題。多通道的偵測更有機會能涵蓋住癲癇發作的原始區域,進而更有效地壓制發作。為了能有效地控制發作,準確率和偵測延遲有必要到達特定的水準(準確率大於90%,延遲在5秒以內) 這篇論文中呈現了癲癇偵測演算法的訓練過程和模擬結果。偵測的延遲是2.25秒。在資料裡面,取樣率分別是1024 Hz, 512 Hz或256 Hz。為了減少硬體的複雜度,我們模擬了訊號窗的長度和降頻的議題。模擬結果顯示1秒的訊號搭配128 Hz的取樣頻率可以讓準確率到達97.76%。 16通道癲癇偵測的數位訊號處理器晶片已經被實現。處理器中主要包含兩個特徵萃取的電路: 128點的近似熵和128點的快速傅立葉轉換電路。近似熵電路的面積是0.17平方毫米,而快速傅立葉轉換電路的面積是0.58平方毫米。數位訊號處理器的面積是1.74平方毫米使用台積電0.18微米的製程。處理器的時脈操作在6.758百萬赫茲,功率是5.5毫瓦。 為了更高的準確率,更複雜的演算法:類神經網路和支持向量機器被採用。模擬結果顯示多層的類神經網路可以讓準確率到98.96%,支持向量機器可以到達99.25%,提供了一個可信賴的偵測結果。
Epileptic seizure control is a popular issue in recent years due to 30% of the epileptic patients remain drug-resistant and only some patients are suitable for resection surgery. The multi-channel seizure detection is also an important issue. The multi-channel detection can have more chances to cover the seizure onset zone so that the seizure can be suppressed efficiently. To achieve the better seizure control efficiency, the accuracy and the latency are necessary to reach certain levels (Accuracy > 90%, Latency < 5 s). In this thesis, a seizure detection algorithm with the training process and the simulation result is presented. The detection latency is 2.25s. For the data set, the sampling rate is 1024 Hz, 512 Hz or 256 Hz. However, in order to reduce the hardware complexity, the window length and the downsample issue are also simulated. The simulation result shows that with 1 s window and 128 Hz sampling rate, the accuracy can be up to 97.76%. A DSP processor for the 16-channel seizure detection has been designed and implemented. There are two main feature extraction circuits: 128-point approximate entropy and 128-point fast Fourier transform. The entropy block occupies 0.17mm2 while the FFT block occupies 0.58mm2, and the area of the DSP processor is 1.74mm2 in TSMC 0.18-um process. The operating frequency of the processor is 6.758 MHz and the power is 5.5 mW. To achieve better accuracy, the more complex algorithms are employed such as neural network (NN) and support vector machine (SVM). The simulation result shows that the multi-layer neural network can achieve the accuracy of 98.96% and the SVM is 99.25% so that the algorithms can provide a reliable detection results.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT070250198
http://hdl.handle.net/11536/127409
顯示於類別:畢業論文