使用氮化鋁及閘極介電質成長後電漿處理法改善三五族砷化銦量子井場效電晶體元件特性之研究

Abstract

當矽材料為主的互補式金氧半導體元件接近微縮極限，因為三五族砷化鎵材料的高電子遷移率及磊晶技術的進步，所以砷化銦通道的金氧半高電子遷移率電晶體在高頻及低耗能邏輯應用具有非常大的發展空間。 由於三五族化合物半導體缺少如矽基板材料穩定的原生氧化物，適當的高介電質材料作為閘極介電質，可以比高電子遷移率電晶體能有更低的閘極漏電流，並提升元件特性。本實驗將閘極介電質加入氧化鋁介面活性層及閘極介電質成長後電漿處理法，藉由使用原子層化學氣相沉積系統製程，可以以較低溫的環境成長閘極介電質，使製程不須經過太多的高溫製程，並且在做電漿處理時，介電質不必經過空氣的暴露，因此可以獲得高品質的閘極介電質，實驗中我們將氧化鋁介面活性層級閘極介電質成長後電漿處理法應用在使用二氧化鉿作為高介電質的元件上，使次臨界擺幅下降到90(mV/dec.)，使汲極感應勢壘改善到80(mV/V)，達到非常好的特性，這種處理方法並且未來可以應用在鰭式場效電晶體(FinFET)、全包覆式閘極電晶體(Gate-All-Around)等各種電晶體製程。

When silicon complementary metal oxide semiconductor(CMOS) scaling approaches to the end of the roadmap, III-V compound semiconductors have high electron mobility property and the epitaxial technology has progressed. Therefore, InAs-based QW-MOSFETs are particularly promising for high frequency and low-power logic application. Unlike Si, III-Vs are lack of high-quality native oxide making Si as the mainstream VLSI technology. Choosing suitable gate dielectrics not only makes gate leakage much lower but also has better electrical characteristics. This study demonstrates Al2O3 and HfO2 on InAs-based QW-MOSFETs with interfacial passivation layers, AlN, and post remote-plasma(PRP) treatment. Both of these two passivation methods are of in-situ atomic layer deposition(ALD) process, so our process can avoid from high temperature process and prevent from oxide surface exposing to the air. Thus, oxide quality can be enhanced accordingly. In this study, AlN passivation layer and post remote plasma are applied on the HfO2 device. We got very good electrical characteristics. Subthreshold swing is 90 (mV/dec.). DIBL is 80(mV/V). In the future, the passivation methods could be applied on different device architectures, such as FinFET, gate-all-around, and 2-D materials.