奈米級金氧半場效電晶體和鰭狀場效電晶體之隨機擾動訊號引致臨界電壓偏移之統計變異建模化

Abstract

在金氧半場效電晶體和鰭狀場效電晶體中，電子在氧化層和矽通道交界面的釋放和捕捉的現象被稱為隨機擾動，此現象對於奈米級半導體元件的可靠度是一個重要的議題。在這個論文中，我們提出一個創新而且可以分析金氧半場效電晶體或鰭狀場效電晶體中臨界電壓擾動的作圖式方法。首先，根據穆勒和薛勒茲這兩位學者對於非均勻通道的理論還有三維電腦科技輔助軟體的模擬，我們可以得到最小的臨界電壓擾動還有在mloc-loc圖中的邊界線；其中的mloc和loc分別是常態分佈的中間值和標準差。 再來，mloc-loc邊界線可以將mloc-loc圖分成允許和禁止的區域，在允許的這個區域中我們可以創造臨界電壓擾動的等位線圖，然後和現有的臨界電壓擾動的統計分布做比較，我們可以萃取出幾組可以代表某個特定非均勻通道的(mloc, loc) 。另外，藉由三維電腦科技輔助軟體的幫助，我們導出一個可以幫助我們節省時間的物理模型。這個物理模型可以應用到重建均勻通道之鰭狀場效電晶體的臨界電壓擾動統計分布。最後，我們也會將偏壓和溫度造成元件不穩定的因素也加入到我們對於隨機擾動現象的討論之中。

The trapping and de-trapping of single electron at the Si/SiO2 interface of planar bulk metal -oxide-semiconductor field effect transistors (MOSFETs) and fin-shape field effect transistors (FinFETs), which is called random telegraph signals (RTSs), has been a well-known issue for the reliability of the nanoscale device. In this work, we proposed a novel graphical method to enable the analysis of the MOSFET or FinFET threshold voltage shift Vth induced by RTS-trap in a percolative channel. First, according to the Mueller-Schulz’s percolation theory and through the help of 3D-technology aided design (TCAD) simulation with no percolation, both a minimum Vth and a critical curve in a mloc-loc plot are produced. Here, mloc and loc are the mean and standard deviation, respectively, of a normal distribution. The critical mloc-loc curve divides the plot into the allowed region and the forbidden region. Then, Vth contours in the allowed region are graphically created. By comparing existing experimental or simulated Vth statistical distributions, we are able to extract paired mloc and loc which represent a particular percolation pattern. Furthermore, through 3D-TCAD simulation, we derive a computationally efficient model which can be applied for constructing the FinFET Vth statistical distribution in a percolation-free channel. Last but not least, bias and temperature instability (BTI) condition is added to RTSs discussion.