背面照光式CMOS影像感測器採用0.11微米製程技術之模擬研究

Abstract

背面照光式CMOS影像感測器不僅改善了早期CMOS影像感測器訊號雜訊比較大的問題，也解決了正面照光式CMOS影像感測器感光能力先天的不足，使的背面照光式成為CMOS影像感測器中的主流。然而隨著製程尺寸與像素尺寸的縮小，背面照光式CMOS影像感測器也遇到了新的問題。 因此本論文的目的是使用TCAD模擬平台對0.11微米背面照光式CMOS影像感測器進行模擬，並藉此模擬來觀察調整製程上的佈植濃度對影像感測器的影響，並與量測結果做比較，希望藉此能輔助製程的走向，完成更優良的像素感測器。

Back Side Illuminated(BSI) image sensor not only reduce the noise problem of early CMOS image sensor(CIS), but also significantly improve the ability to detect dark environment which once was one of the weaknesses of Front Side Illuminated(FSI) image sensor, making the BSI-CIS become the mainstream of image sensor. However, with the CMOS process and pixel size continuous shrink down, BSI-CIS has encountered some new problem. For the main purpose of this essay is to use TCAD stimulation platform for processing the stimulation of 0.11um CMOS technology for BSI-CIS, and observe the effect of implant concentration on the image sensor. Fourth more, we hope to use the outcome to assist the direction of the process, and in the end create a better image sensor.