完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lai, Shin-Chi | en_US |
dc.contributor.author | Liu, Chih-Hao | en_US |
dc.contributor.author | Wang, Ling-Yi | en_US |
dc.contributor.author | Chen, Shin-Hao | en_US |
dc.contributor.author | Chen, Ke-Horng | en_US |
dc.date.accessioned | 2015-12-02T02:59:12Z | - |
dc.date.available | 2015-12-02T02:59:12Z | - |
dc.date.issued | 2015-06-01 | en_US |
dc.identifier.issn | 1549-8328 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TCSI.2015.2411795 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/127906 | - |
dc.description.abstract | This paper presents a novel algorithm and architecture design for 18-band quasi-class-2 ANSI S1.11 1/3 octave filterbank. The proposed design has several advantages such as lower group delay, lower computational complexity, and lower matching error. The technique we developed in this paper can be summarized as follows: 1) a simple low-pass filter (LPF) and discrete cosine transform (DCT) modulation are utilized to generate a uniform 9-band filterbank first, and then all elements of are replaced by all-pass filters to obtain a non-uniform filterbank; 2) a fast recursive structure and variable-length algorithm is further developed to efficiently accomplish DCT modulation. Thus, the spectrum of LPF can be easily spanned and flexibly extended to the location of the desired central frequency; 3) after employing the multi-rate algorithm, an 18-band non-uniform filterbank is generated from two 9-band sub filterbanks by following the proposed design steps and parameter determinations. Compared with the latest Liu et al.\'s quasi-class-2 ANSI S1.11 design, the proposed method-I (Proposed-I) totally has 72.8% reduction for multiplications per sample, 11.25-ms group delay, and 59 additions decreased per sample. Moreover, the maximum matching error of the proposed method-II (Proposed-II) is averagely equal to 1.79 dB much smaller than that of the latest Wei et al.\'s design. For the proposed variable-length DCT modulation, only 2 adders, 2 multipliers, 2 multiplexers, and 5 registers are required for hardware implementation after applying VLSI retiming scheme. Overall, the proposed filterbank design would be a new solution for future applications in the area of hearing aids. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | ANSI S1.11 | en_US |
dc.subject | digital hearing aids | en_US |
dc.subject | discrete cosine transform (DCT) modulation | en_US |
dc.subject | filterbank | en_US |
dc.title | 11.25-ms-Group-Delay and Low-Complexity Algorithm Design of 18-Band Quasi-ANSI S1.11 1/3 Octave Digital Filterbank for Hearing Aids | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TCSI.2015.2411795 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | en_US |
dc.citation.volume | 62 | en_US |
dc.citation.spage | 1572 | en_US |
dc.citation.epage | 1581 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000356935700014 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |