完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChiang, Chien-Hsuehen_US
dc.contributor.authorLi, Yimingen_US
dc.date.accessioned2015-12-02T02:59:16Z-
dc.date.available2015-12-02T02:59:16Z-
dc.date.issued2015-08-01en_US
dc.identifier.issn1551-319Xen_US
dc.identifier.urihttp://dx.doi.org/10.1109/JDT.2014.2387880en_US
dc.identifier.urihttp://hdl.handle.net/11536/127996-
dc.description.abstractWe report a novel design of amorphous silicon gate (ASG) driver circuit with not only low output noises but also improved reliability. The ASG circuits are made of thin-film transistors (TFTs) and integrated in the substrate glass. Unlike the most traditional ASG circuits, the proposed pull-down signals are complementary with lower frequency to discharge the critical nodes in the proposed circuit. The new pull-down signals are created to discharge each two adjacent stage circuits. By inputting two controlled pulse signals, the prospective pull-down signals can be created eventually in the circuit. To simulate the real driving conditions, a string of a resistance (1.24 k Omega) and a capacitance (85.5 pF) are connected to each output as loading. By probing the output pads of the real circuit sample, the output characteristics can practicably be measured. In particular, the output ripples can be suppressed to 0.28 V. Moreover, the measured threshold voltage (V-th)shift with two stressing signals at different frequencies reveals the significant difference. The measured V-th shift after 12 h of the clock stressing with lower frequency (167 Hz) is about 12% slower speed than that of the stressing clock with higher frequency (16.7 kHz) under the high temperature (60 degrees C).en_US
dc.language.isoen_USen_US
dc.subjectAmorphous silicon gate (ASG) driver circuitsen_US
dc.subjectfrequencyen_US
dc.subjectoutput noisesen_US
dc.subjectoutput ripplesen_US
dc.subjectpull-down signalen_US
dc.subjectreliabilityen_US
dc.subjecttemperatureen_US
dc.subjectthin-film transistors (TFTs)en_US
dc.subjectthreshold voltage shiften_US
dc.titleDesign, Fabrication and Characterization of Low-Noise and High-Reliability Amorphous Silicon Gate Driver Circuit for Advanced FPD Applicationsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/JDT.2014.2387880en_US
dc.identifier.journalJOURNAL OF DISPLAY TECHNOLOGYen_US
dc.citation.volume11en_US
dc.citation.spage633en_US
dc.citation.epage639en_US
dc.contributor.department傳播研究所zh_TW
dc.contributor.department電機資訊學士班zh_TW
dc.contributor.departmentInstitute of Communication Studiesen_US
dc.contributor.departmentUndergraduate Honors Program of Electrical Engineering and Computer Scienceen_US
dc.identifier.wosnumberWOS:000359245600001en_US
dc.citation.woscount0en_US
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