標題: Automatic validation for binary translation
作者: Chen, Jiunn-Yeu
Yang, Wuu
Shen, Bor-Yeh
Li, Yuan-Jia
Hsu, Wei-Chung
資訊工程學系
Department of Computer Science
關鍵字: Binary translation;Validation;ARM;QEMU;Architecture state
公開日期: 1-十月-2015
摘要: Binary translation is an important technique for porting programs as it allows binary code for one platform to execute on another. It is widely used in virtual machines and emulators. However, implementing a correct (and efficient) binary translator is still very challenging because many delicate details must be handled smartly. Manually identifying mistranslated instructions in an application program is difficult, especially when the application is large. Therefore, automatic validation tools are needed urgently to uncover hidden problems in a binary translator. We developed a new validation tool for binary translators. In our validation tool, the original binary code and the translated binary code run simultaneously. Both versions of the binary code continuously send their architecture states and the stored values, which are the values stored into memory cells, to a third process, the validator. Since most mistranslated instructions will result in wrong architecture states during execution, our validator can catch most mistranslated instructions emitted by a binary translator by comparing the corresponding architecture states. Corresponding architecture states may differ due to (1) translation errors, (2) different (but correct) memory layouts, and (3) return values of certain system calls. The need to differentiate the three sources of differences makes comparing architecture states very difficult, if not impossible. in our validator, we take special care to make memory layouts exactly the same and make the corresponding system calls always return exactly the same values in the original and in the. translated binaries. Therefore, any differences in the corresponding architecture states indicate mistranslated instructions emitted by the binary translator. Besides solving the architecture-state-comparison problems, we also propose several methods to speed up the automatic validation. The first is the validation-block method, which reduces the number of validations while keeping the accuracy of instruction-level validation. The second is quick validation, which provides extremely fast validation at the expense of less accurate error information. Our validator can be applied to different binary translators. In our experiment, the validator has successfully validated programs translated by static, dynamic, and hybrid binary translators. (C) 2015 Elsevier Ltd. All rights reserved.
URI: http://dx.doi.org/10.1016/j.cl.2015.05.002
http://hdl.handle.net/11536/128128
ISSN: 1477-8424
DOI: 10.1016/j.cl.2015.05.002
期刊: COMPUTER LANGUAGES SYSTEMS & STRUCTURES
Volume: 43
起始頁: 96
結束頁: 115
顯示於類別:期刊論文