以LLVM為基礎所設計的支援X86-64指令集架構之可重定目標混和型二元碼轉譯器

Abstract

混和型二元碼轉譯是結合了動態二元碼轉譯以及靜態二元碼轉譯的一種技術，而HBT-86是一個針對x86指令集架構以LLVM為基礎所開發的可重定目標之混和型二元碼轉譯系統。其支援的來源指令集為x86整數指令、x87浮點數指令、及部份SSE系列的SIMD (單指令流多資料流)整數指令，並且可以產生x86、x64、及ARM-32的目標執行檔。相較於32位元的架構，64位元的架構可以一次存取更大的記憶體及暫存器，因此現在出現越來越多的64位元應用程式，所以我們的研究主要是在HBT-86的來源指令集加入對x64指令的支援。此外，為了確認此混合型二元碼轉譯器的可重定目標性，我們也實作出對ARM-64目標系統的支援。在x64至x64的擬真實驗結果中，對於SPEC2006 CINT Benchmark，此系統之擬真效能是QEMU的2.30倍，對於SPEC2006 CFP Benchmark，其擬真效能是QEMU的2.14倍;在x64至ARM-64的擬真實驗結果中，對於SPEC2006 CINT Benchmark，此系統之擬真的效能是QEMU3.68倍，對於SPEC2006 CFP Benchmark，其擬真效能是QEMU的9.27倍。

Hybrid binary translation (HBT) is a binary translation technology which combines the technologies of static binary translation and dynamic binary translation. The HBT-86 is an LLVM-based retargetable HBT system for x86 instruction set architecture (ISA). For the previous HBT-86, the front-end supports only the x86 integer, x87 floating-point and a part of SSE SIMD integer instruction sets, and the back-end supports the x86 and x64 target platforms. However, comparing with 32-bit ISA, 64-bit ISA can access larger memory and registers. Thus, there are more and more 64-bit executables of applications in recent years. In this thesis, we extend the previous HBT-86 to support x64 source ISA. Moreover, for validating the retargetability of HBT-86, we extend the previous HBT-86 to support ARM-64 target ISA. For x64 to x64 emulation experiments, our HBT-86 is about 2.30 and 2.14 times faster than QEMU for SPEC2006 CINT and SPEC2006 CFP benchmark, respectively. For x64 to ARM-64 emulation, our HBT-86 is about 3.68 and 9.27 times faster than QEMU for SPEC2006 CINT and SPEC2006 CFP benchmark, respectively.