標題: Novel junctionless silicon-oxide-nitride-oxide-silicon memory devices with field-enhanced poly-Si nanowire structure
作者: Chou, Chia-Hsin
Chan, Wei-Sheng
Wu, Chun-Yu
Lee, I-Che
Liao, Ta-Chuan
Wang, Chao-Lung
Wang, Kuang-Yu
Cheng, Huang-Chung
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-八月-2015
摘要: In this work, a novel gate-all-around (GAA) low-temperature poly-Si (LTPS) junctionless (JL) silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory device with a field-enhanced nanowire (NW) structure has been proposed to improve the programing/erasing (P/E) performance. Each nanowire has three sharp corners fabricated by a sidewall spacer formation technique to obtain high local electrical fields. Owing to the higher carrier concentration in the channel and the high local electrical field from the three sharp corners, such a JL SONOS memory device exhibits a significantly enhanced P/E speed, a larger memory window, and better data retention properties than a conventional inversion mode NW-channel memory device. (C) 2015 The Japan Society of Applied Physics
URI: http://dx.doi.org/10.7567/JJAP.54.084201
http://hdl.handle.net/11536/128161
ISSN: 0021-4922
DOI: 10.7567/JJAP.54.084201
期刊: JAPANESE JOURNAL OF APPLIED PHYSICS
Volume: 54
顯示於類別:期刊論文