完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Ching-En | en_US |
dc.contributor.author | Chang, Ting-Chang | en_US |
dc.contributor.author | You, Bo | en_US |
dc.contributor.author | Tsai, Jyun-Yu | en_US |
dc.contributor.author | Lo, Wen-Hung | en_US |
dc.contributor.author | Ho, Szu-Han | en_US |
dc.contributor.author | Liu, Kuan-Ju | en_US |
dc.contributor.author | Lu, Ying-Hsin | en_US |
dc.contributor.author | Hung, Yu-Ju | en_US |
dc.contributor.author | Tseng, Tseung-Yuen | en_US |
dc.contributor.author | Wu, James | en_US |
dc.contributor.author | Tsai, Wei-Kung | en_US |
dc.contributor.author | Chenge, Kuo-Yu | en_US |
dc.contributor.author | Syu, Yong-En | en_US |
dc.date.accessioned | 2015-12-02T02:59:33Z | - |
dc.date.available | 2015-12-02T02:59:33Z | - |
dc.date.issued | 2015-01-01 | en_US |
dc.identifier.issn | 2162-8742 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1149/2.0041510ssI | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/128343 | - |
dc.description.abstract | This paper introduces a method to determine the located region of trap position by the analysis of three-level random telegraph signal (RTS) in partially-depleted silicon-on-insulator n-channel metal-oxide-semiconductor field-effect-transistors. For the cases of two traps, the average time at the 2nd level ((12)) is composed of average emission time of one trap and average capture time of the other. Comparison and analysis of (tau(2)) curves varying with gate voltage in RTS measurements with and without interchanged source/drain can clarify the located regions of the two traps. Moreover, the simplified equations are also considered and used to confirm the trap positions. (C) 2015 The Electrochemical Society. All rights reserved. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A Method to Determine the Located Region of Lateral Trap Position by Analysis of Three-Level Random Telegraph Signals in n-MOSFETs | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1149/2.0041510ssI | en_US |
dc.identifier.journal | ECS SOLID STATE LETTERS | en_US |
dc.citation.issue | 10 | en_US |
dc.citation.spage | Q47 | en_US |
dc.citation.epage | Q49 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000361272100006 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |