標題: | Energy-Efficient Low-Noise 16-Channel Analog-Front-End Circuit for Bio-potential Acquisition |
作者: | Wu, Shang-Lin Huang, Po-Tsang Huang, Teng-Chieh Chen, Kuan-Neng Chiou, Jin-Chern Chen, Kuo-Hua Chiu, Chi-Tsung Tong, Ho-Ming Chuang, Ching-Te Hwang, Wei 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-一月-2014 |
摘要: | In this paper, an energy-efficient and low-noise 16-channel analog front-end (AFE) circuitry is proposed for acquisition of electrophysiological signals. This fully integrated front-end circuit comprises two differential difference amplifiers (DDAs) and DC offset rejection components. Additionally, the DDA is designed using a double input G(m)-stage and a class-AB output for achieving high common-mode rejection ratio (CMRR), low-noise and energy efficiency. The 16-channel AFE with analog-to-digital converters (ADCs) is implemented in TSMC 0.18 mu m CMOS process. The measurement results show that the AFE can realize 60.3dB gain with only 20.67 mu W for each channel. The bandwidth of the AFE is from 2.32Hz to 6.61kHz. Furthermore, the total input referred noise and noise efficiency factor (NEF) are 0.826 mu V-rms and 2.78 only within the target frequency range of 0.1Hz to kHz, respectively. |
URI: | http://hdl.handle.net/11536/128476 |
ISBN: | 978-1-4799-2776-0 |
ISSN: | |
期刊: | 2014 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT) |
顯示於類別: | 會議論文 |