完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWu, P. C.en_US
dc.contributor.authorHsieh, E. R.en_US
dc.contributor.authorLu, P. Y.en_US
dc.contributor.authorChung, Steve S.en_US
dc.contributor.authorChang, K. Y.en_US
dc.contributor.authorLiu, C. H.en_US
dc.contributor.authorKe, J. C.en_US
dc.contributor.authorYang, C. W.en_US
dc.contributor.authorTsai, C. T.en_US
dc.date.accessioned2015-12-02T03:00:54Z-
dc.date.available2015-12-02T03:00:54Z-
dc.date.issued2014-01-01en_US
dc.identifier.isbn978-1-4799-2217-8en_US
dc.identifier.issnen_US
dc.identifier.urihttp://hdl.handle.net/11536/128533-
dc.description.abstractA comprehensive analysis on the BTI induced RTN traps in high-k(HK) CMOS devices have been investigated in inversion (inv.) and accumulation (acc.) modes. The combination of two modes for RTN measurement provides a wide range of energy window in high-k gate dielectric, in which a simple extraction method of RTN analysis has been adopted to analyze the gate dielectric dual-layer of advanced HK devices. The results show that inversion mode measurement can only identify the RTN traps in the channel region, which is related to the V-th degradation. While, accumulation mode may detect the traps inside the gate-drain overlap region which provides better understanding of GIDL current. This basic understanding is of critical important to the quality development of HK gate dielectrics in advanced CMOS technologies.en_US
dc.language.isoen_USen_US
dc.titleThe Observation of BTI-induced RTN Traps in Inversion and Accumulation Modes on HfO2 High-k Metal Gate 28nm CMOS Devicesen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF TECHNICAL PROGRAM - 2014 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000358865800040en_US
dc.citation.woscount0en_US
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