Title: A Cache Aware Multithreading Decision Scheme on GPGPUs
Authors: Yen, Ta-Kang
Yu, Bo-Yao
Lai, Bo-Cheng Charles
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
Keywords: Memory performance;GPGPU;multithreading;design and optimization
Issue Date: 1-Jan-2014
Abstract: GPGPUs have emerged as one of the most widely used throughput processors. Deep multithreading and on-chip cache hierarchy are the two effective designs to achieve high throughput computing in modern GPGPUs. However, excessive multithreading could aggravate the cache contention while conservative multithreading could leave the execution resource under-utilized. Finding a proper design point between the two has become a significant performance factor to GPGPUs. This paper investigates the correlation between caching behavior and multithreading technique. By demonstrating the trade-off issue between the multithreading and cache contention, this paper proposes a multithreading decision scheme to dynamically adjusts the multithreading degree to achieve superior performance. With the proposed decision scheme, the system performance of memory-intensive workloads can be improved by 60% in average.
URI: http://dx.doi.org/10.1109/MCSoC.2014.45
http://hdl.handle.net/11536/128542
ISBN: 978-1-4799-4305-0
ISSN: 
DOI: 10.1109/MCSoC.2014.45
Journal: 2014 IEEE 8TH INTERNATIONAL SYMPOSIUM ON EMBEDDED MULTICORE/MANYCORE SOCS (MCSOC)
Begin Page: 267
End Page: 272
Appears in Collections:Conferences Paper