Design of Bandgap Voltage Reference Circuit with all TFT Devices on Glass Substrate in a 3-mu m UPS Process

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DC 欄位	值	語言
dc.contributor.author	Lu, Ting-Chou	en_US
dc.contributor.author	Ker, Ming-Dou	en_US
dc.contributor.author	Zan, Hsiao-Wen	en_US
dc.contributor.author	Kuo, Chung-Hung	en_US
dc.contributor.author	Li, Chun-Huai	en_US
dc.contributor.author	Hsieh, Yao-Jen	en_US
dc.contributor.author	Liu, Chun-Ting	en_US
dc.date.accessioned	2014-12-08T15:02:38Z	-
dc.date.available	2014-12-08T15:02:38Z	-
dc.date.issued	2008	en_US
dc.identifier.isbn	978-1-4244-2018-6	en_US
dc.identifier.uri	http://hdl.handle.net/11536/1286	-
dc.description.abstract	A bandgap voltage reference (BGR) circuit designed with the low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) on glass substrate is proposed, which has been successfully verified in a 3-mu m LTPS process. The experimental results have shown that the measured temperature coefficient of the new proposed bandgap voltage reference circuit is around 195 ppm/degrees C under the supply voltage of 10V. The proposed bandgap voltage reference circuit can be applied on precise analog circuits for System-on-Panel (SoP) or System-on-Glass (SoG) applications.	en_US
dc.language.iso	en_US	en_US
dc.title	Design of Bandgap Voltage Reference Circuit with all TFT Devices on Glass Substrate in a 3-mu m UPS Process	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE	en_US
dc.citation.spage	721	en_US
dc.citation.epage	724	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000262643900161	-
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