標題: | A High-Performance Multibit-Flipping Algorithm for LDPC Decoding |
作者: | Hung, Jui-Hui Chen, Sau-Gee 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | channel coding;LDPC codes;bit-flipping algorithm |
公開日期: | 2009 |
摘要: | For LDPC decoding, bit-flipping (BF) algorithms are much simpler than the min-sum algorithms (MSA). However, BF algorithms have the disadvantages of poorer performances and higher iteration counts than MSA. This paper introduces the concepts of low correlation search and culprit vote to further improve the efficiency of the existing BF algorithms. High decoding performances and low iteration number are achieved by flipping those bits with low correlation as much as possible and introducing an additional syndrome vote procedure. As a result, the proposed algorithm can achieve significant decoding performance which is very close to the min-sum algorithm (MSA) but with much lower computation complexity. |
URI: | http://hdl.handle.net/11536/12923 |
ISBN: | 978-981-08-2468-6 |
期刊: | PROCEEDINGS OF THE 2009 12TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC 2009) |
起始頁: | 280 |
結束頁: | 283 |
顯示於類別: | 會議論文 |