標題: | Multi-Stage Bit-Flipping Decoding Algorithms for LDPC Codes |
作者: | Chang, Tofar C. -Y. Wang, Pin-Han Su, Yu T. 電機工程學系 電信工程研究所 Department of Electrical and Computer Engineering Institute of Communications Engineering |
關鍵字: | LDPC codes;bit-flipping decoding;loop detection |
公開日期: | 1-九月-2019 |
摘要: | We present two general multi-stage (MS) bit-flipping (BF) decoding algorithms for low-density parity-check (LDPC) codes. Both algorithms consist of soft-decision (SD) and hard-decision BF decoding parts. In comparison with known MS LDPC decoders, our approach is much simpler as all stages share the same BF structure. The only complexity increase is due to the use of an adaptive stage-switching (SS) mechanism which gives near-optimal SS timing. A new design issue we address is that the first-stage algorithm's parameter has to be re-tuned to achieve the optimal overall performance. The numerical results demonstrate that the proposed decoding methods can significantly improve the error-rate performance of the conventional SD BF decoders. |
URI: | http://dx.doi.org/10.1109/LCOMM.2019.2924210 http://hdl.handle.net/11536/152768 |
ISSN: | 1089-7798 |
DOI: | 10.1109/LCOMM.2019.2924210 |
期刊: | IEEE COMMUNICATIONS LETTERS |
Volume: | 23 |
Issue: | 9 |
起始頁: | 1524 |
結束頁: | 1528 |
顯示於類別: | 期刊論文 |