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dc.contributor.authorHuang, CFen_US
dc.contributor.authorTsui, BYen_US
dc.date.accessioned2014-12-08T15:17:50Z-
dc.date.available2014-12-08T15:17:50Z-
dc.date.issued2006-01-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2005.860378en_US
dc.identifier.urihttp://hdl.handle.net/11536/12925-
dc.description.abstractA thin active layer, a fully silicided source/drain (S/D), a modified Schottky-barrier, a high dielectric constant (high-kappa) gate dielectric, and a metal gate are integrated to realize high-performance thin-film transistors (TFTs). Devices with 0.1-mu m gate length were fabricated successfully. Low threshold voltage, low subthreshold swing, high transconductance, low S/D resistance, high on/off current ratio, and negligible threshold voltage rolloff are demonstrated. It is thus suggested for the first time that the short-channel modified Schottky-barrier TFT is a solution to carrier out three-dimension integrated circuits and system-on-panel.en_US
dc.language.isoen_USen_US
dc.subjectthin-film transistor (TFT)en_US
dc.subjectSchottky-barrier (SB)en_US
dc.subjectsilicideen_US
dc.titleShort-channel metal-gate TFTs with modified Schottky-barrier source/drainen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2005.860378en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume27en_US
dc.citation.issue1en_US
dc.citation.spage43en_US
dc.citation.epage45en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000234397800015-
dc.citation.woscount15-
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