下一世代嵌入式新架構電阻式記憶體關鍵技術開發

Full metadata record

DC Field	Value	Language
dc.contributor.author	莊紹勳	zh_TW
dc.date.accessioned	2016-12-20T03:56:43Z	-
dc.date.available	2016-12-20T03:56:43Z	-
dc.date.issued	2016	en_US
dc.identifier.govdoc	MOST105-2221-E009-130-MY3	zh_TW
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=11876331&docId=484524	en_US
dc.identifier.uri	http://hdl.handle.net/11536/131787	-
dc.description.abstract		zh_TW
dc.description.abstract		en_US
dc.description.sponsorship	科技部	zh_TW
dc.language.iso	zh_TW	en_US
dc.subject		zh_TW
dc.subject		en_US
dc.title	下一世代嵌入式新架構電阻式記憶體關鍵技術開發	zh_TW
dc.title	Key Technologies on Developing a New Architecture Resistance Memory for Next Generation Embedded Applications	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系及電子研究所	zh_TW
Appears in Collections:	Research Plans