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dc.contributor.author莊紹勳 zh_TW
dc.date.accessioned2016-12-20T03:56:43Z-
dc.date.available2016-12-20T03:56:43Z-
dc.date.issued2016en_US
dc.identifier.govdocMOST105-2221-E009-130-MY3 zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=11876331&docId=484524en_US
dc.identifier.urihttp://hdl.handle.net/11536/131787-
dc.description.abstract zh_TW
dc.description.abstract en_US
dc.description.sponsorship科技部 zh_TW
dc.language.isozh_TWen_US
dc.subject zh_TW
dc.subject en_US
dc.title下一世代嵌入式新架構電阻式記憶體關鍵技術開發zh_TW
dc.titleKey Technologies on Developing a New Architecture Resistance Memory for Next Generation Embedded Applicationsen_US
dc.typePlanen_US
dc.contributor.department國立交通大學電子工程學系及電子研究所 zh_TW
顯示於類別:研究計畫