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dc.contributor.authorChen, Hua-Maoen_US
dc.contributor.authorChang, Ting-Changen_US
dc.contributor.authorTai, Ya-Hsiangen_US
dc.contributor.authorChiang, Hsiao-Chengen_US
dc.contributor.authorLiu, Kuan-Hsienen_US
dc.contributor.authorChen, Min-Chenen_US
dc.contributor.authorHuang, Cheng-Chiehen_US
dc.contributor.authorLee, Chao-Kueien_US
dc.date.accessioned2017-04-21T06:55:43Z-
dc.date.available2017-04-21T06:55:43Z-
dc.date.issued2016-02en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2015.2508760en_US
dc.identifier.urihttp://hdl.handle.net/11536/132897-
dc.description.abstractIn this letter, we investigated the gate insulator morphology affecting on the electric characteristic variation for organic thin-film transistors (OTFTs). From the transfer characteristics, there is a result with leakage current when the gate voltage is lower than the threshold voltage, which is due to the gate insulator thickness variation. Furthermore, regardless of whether the OTFT is operated under positive or negative bias stress, the more severe degradation happened in the hump region of transfer characteristics. Because a thinner gate insulator causes a high electric field, more charges are trapped in a gate dielectric stack.en_US
dc.language.isoen_USen_US
dc.subjectOTFTen_US
dc.subjectreliabilityen_US
dc.subjectmorphologyen_US
dc.titleGate Insulator Morphology-Dependent Reliability in Organic Thin-Film Transistorsen_US
dc.identifier.doi10.1109/LED.2015.2508760en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume37en_US
dc.citation.issue2en_US
dc.citation.spage228en_US
dc.citation.epage230en_US
dc.contributor.department電子物理學系zh_TW
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Electrophysicsen_US
dc.contributor.departmentDepartment of Photonicsen_US
dc.identifier.wosnumberWOS:000370432000027en_US
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