以噴射式大氣電漿在低溫下開發高品質二氧化矽應用在低電壓操作之有機薄膜電晶體之研究

Abstract

有機薄膜電晶體對許多研究者有很高的吸引力主要來自於它可以應用在可撓式顯示器以及可撓式電子。可撓式顯示器可以用在電子紙，這可以減少樹木的砍伐，而可撓式電子方面可以應用在人工皮膚、軟性感測器、RF-ID，雖然有機薄膜電晶體已經發展很長一段時間，但是在有機薄膜電晶體的發展上仍然存在一些問題，主要包含低的電子遷移率、不穩定性、低溫且低成本的製程、高操作電壓。在本論文中，由於塑膠基板不能承受高溫製程，低溫製程的開發變得越來越重要，就我們所知要得到高品質絕緣層通常需要高溫處理，因此開發低溫高品質的絕緣層將是非常困難的，製作絕緣層方法包含PECVD、PVD和溶液製程，PECVD和PVD雖然廣泛被研究，但是都需要真空設備這將不利於大面積製作以及低成本的應用。溶液製程雖然符合低成本需求，但是容易在薄膜中形成孔洞而且為了去除薄膜裡的溶劑需要長時間的烘烤。 目前大多數的OTFTs都操作在高電壓約 -20 V~-40 V，這將會造成較高的功率損耗且不利於應用在攜帶式電子產品。所以如何降低操作電壓是非常之重要的，目前通常利用高介電係數材料以及較薄的絕緣層來當作閘極介電層，這可以增加單位面積的電容值去減少操作電壓。 剛開始為了開發低溫且低成本製程，我們致力於利用大氣電漿技術去開發高品質二氧化矽薄膜當做有機薄膜電晶體絕緣層。因為大氣電漿可以操作在低溫下且適合大面積低成本製程的應用。在第二章我們分析溫度、流量、噴嘴距離、主要氣體對薄膜品質的影響。如我們期待的，我們利用大氣電漿在基板溫度約為150 OC下成功開發出高品質的二氧化矽薄膜，漏電流密度約為2.53E-8 A/cm2 在0.5 MV/cm，目前大多數研究所發表的絕緣層漏電流密度約為1E-8~5E-6 A/cm2 at 0.5 MV/cm且大多數不符合低溫低成本的製程，在第三章，為了減小操作電壓我們絕緣層厚度控制在約10 nm來增加絕緣層單位面積的電容值，我們成功的將所開發出來的高品質二氧化矽整合到低電壓操作的元件上，有機薄膜電晶體操作電壓小於 -2 V、截止電壓約為 -0.8 V、電子遷移率約為0.66 cm2/V-s、次臨界電壓約為700 mV/decade，大多數研究者所發表出來的操作電壓通常大於 -20 V，我們在絕緣層品與元件特性有顯著的改善。 在我們成功沉積高品質絕緣層後，對二氧化矽做表面處理將有助於改善主動層的分子排列，這有助於電子遷移率的提升，但我們發現在做完表面處理後漏電流卻增加了，而這現象並沒有被討論過，且我們認識為這將會限制未來短通道有機薄膜電晶體的發展，為了瞭解這現象我們利用top-contact結構去討論表面處理對漏電流的影響在第四章。

Organic thin film transistors (OTFTs) have lots of attraction for many researches because of their interesting and innovative applications on flexible display and flexible electronics. Flexible display could be used as an e-book which could reduce the use of woods. On the other hand, flexible electronics would be applied for artificial skin, flexible sensors, and RF-ID. Although OTFTs have been studied for a long time, there are still some issues influencing the development of OTFTs. These issues of OTFTs include low mobility, instability, low cost and temperature processes, and high operation voltage. In this dissertation, we aim to develop low cost ant temperature processes of gate insulator and low-voltage OTFTs. Because the plastic substrate could not sustain high temperature processes, the development of low-temperature processed OTFTs is more and more important. As we known, to gain good film quality with a low leakage current, a high-temperature insulator activation is required. Therefore, it is very difficult to develop low temperature processes for high-quality gate insulator. Fabricating approaches of gate insulator include PECVD, PVD, and solution processes. PECVD and PVD are widely used to deposit insulator but they need a vacuum system and higher cost which are not suitable for large area application of flexible display. Although solution processes could decrease the cost, this method easily forms the pin-hole and needs a long-time baking for solvent-free. In most researches, OTFTs operated at high voltage about -20 V ~ -60 V which would lead to high power consumption. Because the high power consumption is not suitable for portable electronics, how to reduce the operation voltage of OTFTs would be urgent for flexible display and flexible electronics. Therefore, many researches utilized high-k material or thin insulator as gate dielectric, increasing capacitance of per unit area dielectric, to reduce the operation voltage. In the beginning, we aim at the development of low cost and temperature processes. We are devoted to use atmospheric pressure plasma jet (APPJ) for depositing high quality silicon dioxide (SiO2) as the gate insulator of OTFTs. Because APPJ could be operated at low temperature and atmospheric pressure, it is suitable for large area and low cost application. In chapter 2, we analyzed the influence of substrate temperature, flow rate, gap distance, and main gas on the quality of SiO2. As we expected, a low leakage current density of 2.53 E-8 A/cm2 at 0.5 MV /cm for SiO2 deposited by APPJ at low temperature about 150 OC was demonstrated here. The leakage current density of most researches are between 1E-8~5E-6 A/cm2 at 0.5 MV /cm and most of them are not suitable for low cost and temperature processes. In order to reduce operation voltage of OTFTs, the thickness of SiO2 was controlled about 10 nm to increase the capacitance of per unit area dielectric. Low-voltage OTFTs were successfully integrated with APPJ-SiO2 which was described in chapter 3. These OTFTs showed a lower operation voltage about -2 V, a lower threshold voltage about -0.8 V, a good mobility 0.66 cm2/V-s, and a good subthreshold swing about 700 mV/decade. We got obviously improvement on the performance of gate insulator and OTFTs by using APPJ. After we successfully deposited high quality silicon oxide, surface treatment on the silicon oxide could be used to improve ordering of active layer which would increase mobility of OTFTs. However, we found that the leakage current would increase with a surface treatment. We consider this phenomenon would limit the development of short channel OTFTs. In order to understand the phenomenon, we utilized top-contact structure to discuss the influence of the surface treatment on leakage current in chapter 4.