標題: | Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV) |
作者: | Shen, Wen-Wei Chen, Kuan-Neng 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Through-silicon via (TSV);Three-dimensional integrated circuit (3D IC) |
公開日期: | 19-一月-2017 |
摘要: | 3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper. |
URI: | http://dx.doi.org/10.1186/s11671-017-1831-4 http://hdl.handle.net/11536/133029 |
ISSN: | 1556-276X |
DOI: | 10.1186/s11671-017-1831-4 |
期刊: | NANOSCALE RESEARCH LETTERS |
Volume: | 12 |
起始頁: | 0 |
結束頁: | 0 |
顯示於類別: | 期刊論文 |