完整後設資料紀錄
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dc.contributor.authorGuo, Jyh-Chyurnen_US
dc.contributor.authorDu, Pei-Yingen_US
dc.date.accessioned2017-04-21T06:56:32Z-
dc.date.available2017-04-21T06:56:32Z-
dc.date.issued2017-03en_US
dc.identifier.issn1530-4388en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TDMR.2016.2626461en_US
dc.identifier.urihttp://hdl.handle.net/11536/133144-
dc.description.abstractA comprehensive characterization method has been developed in this paper for reliable lateral profiling of the interface traps (Delta N-it), localized charges (Delta N-ot), and trapped holes (Delta N-hole) in P-SONOS cell devices. Charge pumping current (I-CP) measurement can be used to probe Delta N-it and Delta N-ot from the increase of maximum I-CP (I-CP,I- max) and the shift of I-CP curve along the base level voltage (V-b). When increasing the program and erase (P/E) cycles, the negative threshold voltage (V-T) shift at both program and erase states suggests the generation of Delta N-hole. The evolution of Delta N-it, Delta N-ot, and Delta N-hole during P/E cycling can consistently explain the nonmonotonic variations of gate induced drain leakage current (I-GIDL) and substrate current (I-SUB) as well as dramatic differences between the source and drain. The lateral migration of Delta N-ot caused by extending P/E cycles may lead to the failure of two-bit operation in SONOS cell devices. The larger V-T shift and subthreshold swing, smaller read current, and lower transconductance may degrade the endurance and retention of P-SONOS when applied in Flash memory.en_US
dc.language.isoen_USen_US
dc.subjectSONOSen_US
dc.subjectcharge pumpingen_US
dc.subjectlateral profilingen_US
dc.subjectinterface trapsen_US
dc.subjectlocalized chargesen_US
dc.subjecttrapped holesen_US
dc.titleA Comprehensive Characterization Method for Lateral Profiling of Interface Traps and Trapped Charges in P-SONOS Cell Devicesen_US
dc.identifier.doi10.1109/TDMR.2016.2626461en_US
dc.identifier.journalIEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITYen_US
dc.citation.volume17en_US
dc.citation.issue1en_US
dc.citation.spage121en_US
dc.citation.epage129en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000396397600015en_US
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