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dc.contributor.authorLi, YMen_US
dc.contributor.authorChou, HMen_US
dc.contributor.authorLee, JWen_US
dc.date.accessioned2014-12-08T15:18:30Z-
dc.date.available2014-12-08T15:18:30Z-
dc.date.issued2005-09-01en_US
dc.identifier.issn1536-125Xen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TNANO.2005.851410en_US
dc.identifier.urihttp://hdl.handle.net/11536/13314-
dc.description.abstractIn this paper, electrical characteristics of small nanowire fin field-effect transistor (FinFET) are investigated by using a three-dimensional quantum correction simulation. Taking several important electrical characteristics as evaluation criteria, two different nanowire FinFETs, the surrounding-gate and omega-shaped-gate devices, are examined and compared with respect to different ratios of the gate coverage. By calculating the ratio of the on/off current, the turn-on resistance, subthreshold swing, drain-induced channel barrier height lowing, and gate capacitance, it is found that the difference of the electrical characteristics between the surrounding-gate (i.e., the omega-shaped-gate device with 100% coverage) and the omega-shaped-gate nanowire FinFET with 70% coverage is insignificant. The examination presented here is useful in the fabrication of small omega-shaped-gate nanowire FinFETs. It clarifies the main difference between the surrounding-gate and omega-shaped-gate nanowire Fin FETs and exhibits a valuable result that the omega-shaped-gate device with 70% coverage plays an optimal candidate of the nanodevice structure when we consider both the device performance and manufacturability.en_US
dc.language.isoen_USen_US
dc.subjectcoverage ratioen_US
dc.subjectdevice structureen_US
dc.subjectfabricationen_US
dc.subjectfin field-effect transistor (FinFET)en_US
dc.subjectgate capacitanceen_US
dc.subjectnanodeviceen_US
dc.subjectnanowireen_US
dc.subjectomega-shaped-gateen_US
dc.subjecton/off ratioen_US
dc.subjectprocess techniqueen_US
dc.subjectquantum correction modelen_US
dc.subjectsemiconductor devicesen_US
dc.subjectsubthreshold swing (SS)en_US
dc.subjectsurrounding gateen_US
dc.subjectthree-dimensional (3-D) simulationen_US
dc.subjectturn-on resistanceen_US
dc.titleInvestigation of electrical characteristics on surrounding-gate and omega-shaped-gate nanowire FinFETsen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1109/TNANO.2005.851410en_US
dc.identifier.journalIEEE TRANSACTIONS ON NANOTECHNOLOGYen_US
dc.citation.volume4en_US
dc.citation.issue5en_US
dc.citation.spage510en_US
dc.citation.epage516en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.department友訊交大聯合研發中心zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.contributor.departmentD Link NCTU Joint Res Ctren_US
dc.identifier.wosnumberWOS:000231809500005-
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