完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWang, Zhuo-Ruien_US
dc.contributor.authorSu, Yu-Tingen_US
dc.contributor.authorLi, Yien_US
dc.contributor.authorZhou, Ya-Xiongen_US
dc.contributor.authorChu, Tian-Jianen_US
dc.contributor.authorChang, Kuan-Changen_US
dc.contributor.authorChang, Ting-Changen_US
dc.contributor.authorTsai, Tsung-Mingen_US
dc.contributor.authorSze, Simon M.en_US
dc.contributor.authorMiao, Xiang-Shuien_US
dc.date.accessioned2017-04-21T06:56:37Z-
dc.date.available2017-04-21T06:56:37Z-
dc.date.issued2017-02en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2016.2645946en_US
dc.identifier.urihttp://hdl.handle.net/11536/133171-
dc.description.abstractNonvolatile stateful logic through RRAM is a promising route to build in-memory computing architecture. In this letter, a logic methodology based on 1T1R structure has been proposed to implement functionally complete Boolean logics. Arbitrary logic functions could be realized in two steps: initialization and writing. An additional read step is required to read out the logic result, which is in situ stored in the nonvolatile resistive state of the memory. Cascade problem in building larger logic circuits is also discussed. Our 1T1R logic device and operation method could be beneficial for massive integration and practical application of RRAM-based logic.en_US
dc.language.isoen_USen_US
dc.subject1T1R RRAMen_US
dc.subjectBoolean logicsen_US
dc.subjectnonvolatileen_US
dc.subjectlogic in memoryen_US
dc.titleFunctionally Complete Boolean Logic in 1T1R Resistive Random Access Memoryen_US
dc.identifier.doi10.1109/LED.2016.2645946en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume38en_US
dc.citation.issue2en_US
dc.citation.spage179en_US
dc.citation.epage182en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000395470700007en_US
顯示於類別:期刊論文