Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Juang, W. -H. | en_US |
dc.contributor.author | Lai, S. -C. | en_US |
dc.contributor.author | Chen, K. -H. | en_US |
dc.contributor.author | Tsai, W. -K. | en_US |
dc.contributor.author | Luo, C. -H. | en_US |
dc.date.accessioned | 2017-04-21T06:56:20Z | - |
dc.date.available | 2017-04-21T06:56:20Z | - |
dc.date.issued | 2017-01-05 | en_US |
dc.identifier.issn | 0013-5194 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1049/el.2016.3106 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/133212 | - |
dc.description.abstract | A novel hopping discrete Fourier transform (DFT) algorithm and its architecture design for efficiently computing time-frequency spectra are presented. Since the sliding process is adopted sample by sample, the spectral bin output data rate is the same as the input data rate. Under the conditions of an M-sample complex input sequence (M = 256), and N-point recursive DFT computation (N = 64) for time hop L (L = 4), the proposed method has the following advantages: (i) the computational complexity of Proposed-I requires only four complex additions and four complex multiplications for each frequency bin, after the first spectral component has been finally calculated; (ii) Proposed-II utilises a re-timing scheme to greatly shorten and balance the critical path; (iii) Proposed-II is less computationally complex than Wang et al.\'s method, as the numbers of multiplication and addition operations in the proposed algorithm are 768 and 1024, representing reductions of 50 and 20%, respectively. In addition, the number of coefficients can be reduced by 50% compared with Park et al.\'s method. In the FPGA implementation, the proposed design can be operated at 47.26 MHz. It is thus more suitable for use with real-time analytic applications of time-frequency spectra. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | frequency hop communication | en_US |
dc.subject | discrete Fourier transforms | en_US |
dc.subject | computational complexity | en_US |
dc.subject | time-frequency analysis | en_US |
dc.subject | low-complexity hopping DFT design | en_US |
dc.subject | compact recursive structure | en_US |
dc.subject | hopping discrete Fourier transform algorithm | en_US |
dc.subject | sliding process | en_US |
dc.subject | FPGA | en_US |
dc.title | Low-complexity hopping DFT design based on a compact recursive structure | en_US |
dc.identifier.doi | 10.1049/el.2016.3106 | en_US |
dc.identifier.journal | ELECTRONICS LETTERS | en_US |
dc.citation.volume | 53 | en_US |
dc.citation.issue | 1 | en_US |
dc.citation.spage | 25 | en_US |
dc.citation.epage | 26 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000393750600014 | en_US |
Appears in Collections: | Articles |