完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Hsu, Chih-Wei | en_US |
dc.contributor.author | Fan, Ming-Long | en_US |
dc.contributor.author | Hu, Vita Pi-Ho | en_US |
dc.contributor.author | Su, Pin | en_US |
dc.date.accessioned | 2017-04-21T06:55:34Z | - |
dc.date.available | 2017-04-21T06:55:34Z | - |
dc.date.issued | 2015-05 | en_US |
dc.identifier.issn | 2168-6734 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/133375 | - |
dc.description.abstract | This paper investigates and compares the impacts of metal-gate work-function variation (WFV) on III-V heterojunction tunnel FET (HTFET), homojunction TFET, and FinFET devices using a novel Voronoi method to capture the realistic metal-gate grain patterns for Technology Computer Aided Design atomistic simulations. Due to the broken-gap nature, HTFET shows significantly steeper subthreshold slope and higher susceptibility to WFV near OFF state. For ON current variation, both the HTFET and homojunction TFET show better immunity to WFV than the III-V FinFET. Device design using source-side underlap to mitigate the impact of WFV on HTFET is also assessed. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Work-function variation (WFV) | en_US |
dc.subject | heterojunction tunnel FET (HTFET) | en_US |
dc.title | Investigation and Simulation of Work-Function Variation for III-V Broken-Gap Heterojunction Tunnel FET | en_US |
dc.identifier.journal | IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY | en_US |
dc.citation.volume | 3 | en_US |
dc.citation.issue | 3 | en_US |
dc.citation.spage | 200 | en_US |
dc.citation.epage | 205 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000369884400016 | en_US |
顯示於類別: | 期刊論文 |