Abnormal positive bias stress instability of In-Ga-Zn-O thin-film transistors with low-temperature Al2O3 gate dielectric

Abstract

Low-temperature atomic layer deposition (ALD) was employed to deposit Al2O3 as a gate dielectric in amorphous In-Ga-Zn-O thin-film transistors fabricated at temperatures below 120 degrees C. The devices exhibited a negligible threshold voltage shift (Delta V-T) during negative bias stress, but a more pronounced Delta V-T under positive bias stress with a characteristic turnaround behavior from a positive Delta V-T to a negative Delta V-T. This abnormal positive bias instability is explained using a two-process model, including both electron trapping and hydrogen release and migration. Electron trapping induces the initial positive Delta V-T, which can be fitted using the stretched exponential function. The breakage of residual AlO-H bonds in low-temperature ALD Al2O3 is triggered by the energetic channel electrons. The hydrogen atoms then diffuse toward the In-Ga-Zn-O channel and induce the negative Delta V-T through electron doping with power-law time dependence. A rapid partial recovery of the negative Delta V-T after stress is also observed during relaxation. (C) 2016 AIP Publishing LLC.