Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Yang, Shang-Hsien | en_US |
dc.contributor.author | Meng, Che-Hao | en_US |
dc.contributor.author | Chiu, Chao-Chang | en_US |
dc.contributor.author | Chang, Chih-Wei | en_US |
dc.contributor.author | Chen, Ke-Horng | en_US |
dc.contributor.author | Lin, Ying-Hsi | en_US |
dc.contributor.author | Lin, Shian-Ru | en_US |
dc.contributor.author | Tsai, Tsung-Yen | en_US |
dc.date.accessioned | 2017-04-21T06:55:20Z | - |
dc.date.available | 2017-04-21T06:55:20Z | - |
dc.date.issued | 2016-09 | en_US |
dc.identifier.issn | 0278-0046 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TIE.2016.2527630 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/134252 | - |
dc.description.abstract | A buck power factor correction (PFC) converter operating in continuous conduction mode (CCM) is influenced by the dead zone, which introduces distortion related to the input line voltage. Such phenomenon limits the maximum power factor (PF) and the minimum total harmonic distortion (THD) achievable. By deriving a methodology to achieve predictive line voltage reconstruction (PLVR), the influence of the dead zone is mitigated. With the prediction of quadratic sinusoidal current modulation ((PSCM)-C-2), the line current is shaped into sinusoid waveform that is in-phase with input line voltage, crucial for. Consequently, the proposed CCM buck PFC can achieve high PF, low THD, and efficiency simultaneously. A test chip was fabricated in 0.5-mu m Bipolar-CMOS-DMOS (BCD) process. The experimental results show a peak PF of 0.95 and a peak efficiency of 98% at 110 Vac. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Buck power factor correction (PFC) | en_US |
dc.subject | continuous conduction mode (CCM) | en_US |
dc.subject | line voltage rebuild | en_US |
dc.subject | quadratic sinusoidal current modulation | en_US |
dc.title | A Buck Power Factor Correction Converter with Predictive Quadratic Sinusoidal Current Modulation and Line Voltage Reconstruction | en_US |
dc.identifier.doi | 10.1109/TIE.2016.2527630 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | en_US |
dc.citation.volume | 63 | en_US |
dc.citation.issue | 9 | en_US |
dc.citation.spage | 5912 | en_US |
dc.citation.epage | 5920 | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | 電機工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.contributor.department | Department of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000384641600062 | en_US |
Appears in Collections: | Articles |