標題: VASS - A VLSI array system synthesizer
作者: Yeh, JW
Cheng, WJ
Jen, CW
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-May-1996
摘要: This paper presents a computer-aided design environment called VASS, which assists the VLSI array design. It applies a systematic methodology to synthesize a competitive array system from a behavioral description. Special features include the multiple projection and the two level pipeline techniques. Several crucial issues are considered and some practical solutions are incorporated into VASS. For example, an effective approach is used to transport all the interior I/O to the boundaries of the array. Besides, VASS can generate a kind of control signals, called tags, which propagate with data through the whole array to specify the appropriate functions of each processing element at the appropriate time step. Also, based on the inherent characteristics of the systolic algorithms, a high level synthesis method is proposed to facilitate the datapath generation of processing elements in the resultant array. The automatic specification of control signals and datapath generation of the processing elements render VASS a complete VLSI array system synthesizer. With VASS, one can quickly inspect various array implementations for an algorithm and iteratively improve them to meet the demands of an application-specific VLSI array system.
URI: http://hdl.handle.net/11536/1343
ISSN: 0922-5773
期刊: JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY
Volume: 12
Issue: 2
起始頁: 135
結束頁: 158
Appears in Collections:Articles