Title: The Design of 8-Channel CMOS Area-Efficient Low-Power Current-Mode Analog Front-End Amplifier for EEG Signal Recording
Authors: Sung, Ya-Syuan
Chen, Wei-Ming
Wu, Chung-Yu
電子工程學系及電子研究所
生醫電子轉譯研究中心
Department of Electronics Engineering and Institute of Electronics
Biomedical Electronics Translational Research Center
Keywords: analog front-end amplifier;area-efficient;low-power;electroencephalography recording
Issue Date: 2016
Abstract: In this paper, an 8-channel area-efficient low-power current-mode analog front-end amplifier (AFEA) is designed for EEG signal recording. The AFEA is composed of eight capacitive coupled transconductors (CCGMs), current-mode band-pass filters (CMBPFs), and programmable current-gain amplifiers (PCGAs) with a multiplexer (MUX), a transimpedance amplifier (TIA), and an offset current cancellation loop (OCCL). The AFEA employs CCGM with only 2pF input capacitance to eliminate the electrode dc offset (EDO). The current-mode topology is adopted in the design of CCGMs, CMBPFs, and PCGAs to reduce the power consumption. The shared OCCL is designed to eliminate the output offset of CCGM, CMBPF and PCGA. The AFEA is designed and fabricated in 180-nm CMOS technology and the core area occupies only 1mm(2). The measured maximum gain is 82 dB. The measured input-referred noise is 3.34 mu V-rms within the bandwidth of 0.5-100 Hz. The measured maximum power consumption is 7.85 mu W per channel under power supply of 1.2V. The fabricated AFEA is applied to record the human EEG signal successfully.
URI: http://hdl.handle.net/11536/134364
ISBN: 978-1-4799-5341-7
ISSN: 0271-4302
Journal: 2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Begin Page: 530
End Page: 533
Appears in Collections:Conferences Paper