標題: | A Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver |
作者: | Liu, Chun-Yi Sie, Meng-Siou Leong, Edmund Wen Jen Yao, Yu-Cheng Jen, Chih-Wei Jou, Shyh-Jye 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2016 |
摘要: | In this paper, a novel memory access reordering polyphase network (PPN) for 60 GHz filter bank multi-carrier (FBMC) offset QAM (OQAM) baseband receiver is presented. The 8X-parallelism architecture of PPN is integrated into our 8X-parallelism digital baseband receiver. The PPN is designed based on IEEE 802.15.3c and IEEE 802.11ad standards. The PPN contains three key modules including memory bank, filter coefficient selector and 4-tap PPN filter. The proposed PPN is synthesized with 40 nm 1P9M general purposes (GP) process. The implementation result shows it can operate at specified 330/500 MHz clock rate with power consumption of 17/26 mW at 0.81 V supply voltage. With 8X-parallelism architecture, the sampling rate supports up to 2.64/4 GHz. |
URI: | http://hdl.handle.net/11536/134374 |
ISBN: | 978-1-4799-5341-7 |
ISSN: | 0271-4302 |
期刊: | 2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
起始頁: | 2655 |
結束頁: | 2658 |
顯示於類別: | 會議論文 |