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dc.contributor.authorChen, Zuow-Zunen_US
dc.contributor.authorLi, Yileien_US
dc.contributor.authorKuan, Yen-Chengen_US
dc.contributor.authorHu, Boyuen_US
dc.contributor.authorWong, Chien-Hengen_US
dc.contributor.authorChang, Mau-Chung Franken_US
dc.date.accessioned2017-04-21T06:49:21Z-
dc.date.available2017-04-21T06:49:21Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-5090-0635-9en_US
dc.identifier.urihttp://hdl.handle.net/11536/134570-
dc.description.abstractA digital phase noise cancellation technique for ring oscillator-based I/Q receivers is presented. Ring oscillator phase noise, including supply-induced phase noise, is extracted from digital phase-locked loop (DPLL) and used to restore the randomly rotated baseband signal in digital domain. The receiver prototype fabricated in 65nm CMOS technology achieves phase noise reduction from - 88 to - 109dBc/Hz at 1MHz offset, and an integrated phase noise (IPN) reduction from - 16.8 to - 34.6dBc, when operating at 2.4GHz.en_US
dc.language.isoen_USen_US
dc.titleDigital PLL for Phase Noise Cancellation in Ring Oscillator-Based I/Q Receiversen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 IEEE SYMPOSIUM ON VLSI CIRCUITS (VLSI-CIRCUITS)en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000392504700043en_US
dc.citation.woscount0en_US
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