標題: | Impact of Nanoscale Polarization Relaxation on Endurance Reliability of One-Transistor Hybrid Memory Using Combined Storage Mechanisms |
作者: | Chiu, Yu-Chien Chang, Chun-Yen Hsu, Hsiao-Hsuan Cheng, Chun-Hu Lee, Min-Hung 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | nonvolatile memory;ferroelectric polarization;charge trapping;endurance;retention |
公開日期: | 2015 |
摘要: | We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 10(12)-cycling endurance at 85 degrees C. Such excellent endurance reliability at 85 degrees C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability. |
URI: | http://hdl.handle.net/11536/134590 |
ISBN: | 978-1-4673-7362-3 |
ISSN: | 1541-7026 |
期刊: | 2015 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) |
Appears in Collections: | Conferences Paper |