Improvement of Oxide Reliability in NAND Flash Memories Using Tight Endurance Cycling with Shorter Idling Period

Abstract

It has been newly found that shorter intervals between program and erase operations can suppress the oxide degradation more significantly in a 0.05 to 5 sec timeframe. Our new analysis clearly demonstrates the following degradation phenomena: a longer interval yields more trapped charges near the Si surface and surface states. Our results also indicate that the oxide degradation occurs more significantly during the erase-to-program interval than in the program-to-erase interval. These findings suggest that the erasing step causes a self-induced positive FG potential yields an accumulation of trapped holes near the Si surface and also generates surface states during the interval from erase-to-program. In addition, regarding retention characteristics, larger Vt shifts caused by the reduction of surface states and electron detrapping of oxide charges are observed in the longer interval. Based on these results, a new NAND operation scheme is proposed to improve reliability in shorter intervals.