完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, Hua-Yu | en_US |
dc.contributor.author | Jiang, Iris Hui-Ru | en_US |
dc.contributor.author | Chang, Yao-Wen | en_US |
dc.date.accessioned | 2017-04-21T06:48:45Z | - |
dc.date.available | 2017-04-21T06:48:45Z | - |
dc.date.issued | 2014 | en_US |
dc.identifier.isbn | 978-1-4503-2730-5 | en_US |
dc.identifier.issn | 0738-100X | en_US |
dc.identifier.uri | http://dx.doi.org/10.1145/2593069.2593145 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/134709 | - |
dc.description.abstract | Metal-configarable gate-array spare cells, which have versatile functionality, are developed to overcome the inflexibility of standard spare cells used in conventional metal-only engineering change order (ECO). In this paper, we focus on functional ECO optimization using the new type of spare cells to fully exploit its strength. We observe that this functional LCD problem has the nature of dynamic logical and physical costs for at spare gate arrays. Unlike existing functional E0 works, which perform technology snapping based on ECO patches, we perform reverse mapping from spare gate arrays to handle these dynamic costs. We devise a spare array relation graph to record geometrical adjacency among spare gate arrays and interleave with the and-inverter network of ECO patches. To avoid redundant traversal and monitor the dynamic costs, we adopt A* search to simultaneously traverse and imp between the logical LCD network and the physical spare array relation graph. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Engineering change order | en_US |
dc.subject | Gate array | en_US |
dc.subject | Technology mapping | en_US |
dc.title | Functional ECO Using Metal-Configurable Gate-Array Spare Cells | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.doi | 10.1145/2593069.2593145 | en_US |
dc.identifier.journal | 2014 51ST ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000346506400188 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |