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dc.contributor.authorChang, Yao-Fengen_US
dc.contributor.authorChen, Ying-Chenen_US
dc.contributor.authorLi, Jien_US
dc.contributor.authorXue, Feien_US
dc.contributor.authorWang, Yanzhenen_US
dc.contributor.authorZhou, Feien_US
dc.contributor.authorFowler, Burten_US
dc.contributor.authorLee, Jack C.en_US
dc.date.accessioned2017-04-21T06:48:34Z-
dc.date.available2017-04-21T06:48:34Z-
dc.date.issued2013en_US
dc.identifier.isbn978-1-4799-0811-0en_US
dc.identifier.isbn978-1-4799-0812-7en_US
dc.identifier.issn1548-3770en_US
dc.identifier.urihttp://hdl.handle.net/11536/134738-
dc.language.isoen_USen_US
dc.titleComprehensive Trap-Level Study in SiOx-based Resistive Switching Memoryen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2013 71ST ANNUAL DEVICE RESEARCH CONFERENCE (DRC)en_US
dc.citation.spage135en_US
dc.citation.epage+en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000347466000073en_US
dc.citation.woscount1en_US
Appears in Collections:Conferences Paper