Comprehensive Trap-Level Study in SiOx-based Resistive Switching Memory

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Chang, Yao-Feng	en_US
dc.contributor.author	Chen, Ying-Chen	en_US
dc.contributor.author	Li, Ji	en_US
dc.contributor.author	Xue, Fei	en_US
dc.contributor.author	Wang, Yanzhen	en_US
dc.contributor.author	Zhou, Fei	en_US
dc.contributor.author	Fowler, Burt	en_US
dc.contributor.author	Lee, Jack C.	en_US
dc.date.accessioned	2017-04-21T06:48:34Z	-
dc.date.available	2017-04-21T06:48:34Z	-
dc.date.issued	2013	en_US
dc.identifier.isbn	978-1-4799-0811-0	en_US
dc.identifier.isbn	978-1-4799-0812-7	en_US
dc.identifier.issn	1548-3770	en_US
dc.identifier.uri	http://hdl.handle.net/11536/134738	-
dc.language.iso	en_US	en_US
dc.title	Comprehensive Trap-Level Study in SiOx-based Resistive Switching Memory	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2013 71ST ANNUAL DEVICE RESEARCH CONFERENCE (DRC)	en_US
dc.citation.spage	135	en_US
dc.citation.epage	+	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000347466000073	en_US
dc.citation.woscount	1	en_US
顯示於類別：	會議論文