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dc.contributor.authorLi, Jianjunen_US
dc.contributor.authorWu, Chenggangen_US
dc.contributor.authorHsu, Wei-Chungen_US
dc.date.accessioned2017-04-21T06:50:07Z-
dc.date.available2017-04-21T06:50:07Z-
dc.date.issued2011en_US
dc.identifier.isbn978-1-61284-355-1en_US
dc.identifier.issn2164-2397en_US
dc.identifier.urihttp://hdl.handle.net/11536/134802-
dc.description.abstractDynamic Binary Translation (DBT) has been widely used in various applications. Although new architectures and micro-architectures often create performance opportunities for programmers and compilers, such performance opportunities may not be exploited by legacy executables. For example, the additional general-purpose and XMM registers in the Intel64 architecture do not benefit the IA-32 binaries. In this paper, we designed and developed a DBT system to dynamically promote stack variables in the source binaries to the additional registers of the target architecture. One of the most challenging problems is how to deal with the possible but rare memory aliases between promoted stack variables and other implicit memory references. We devised a runtime alias detection approach based on the page protection mechanism in Linux and a novel stack switching method to catch memory aliases at run-time. This approach is much less expensive than traditional approaches like inserting address checking instructions. On an Intel64 platform, our DBT system with speculative stack variable promotion has sped up several SPEC CPU2006 benchmarks in IA-32 code, with the largest performance gain over 45%.en_US
dc.language.isoen_USen_US
dc.titleDynamic Register Promotion of Stack Variablesen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2011 9TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION (CGO)en_US
dc.citation.spage21en_US
dc.citation.epage31en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000298560000005en_US
dc.citation.woscount2en_US
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