同步多執行緒架構中可彈性切割與可延展的暫存器檔案設計之研究

Abstract

如何利用最少的硬體資源來支援同步多執行緒是一個很重要的研究議題，暫存器檔案(Register file)在微處理器晶片面積中佔有顯著的比例。而且為了支援同步多執行緒，每一個執行緒享有自己的一份暫存器檔案，這樣的設計會增加晶片的面積。 在本篇論文中，我們提出了一份可彈性切割與可延展的暫存器檔案設計，在這個設計裡：1.我們可以在需要的時候彈性切割一份暫存器檔案給兩個執行緒來同時使用，2.適當的延伸暫存器檔案的大小來增加兩個執行緒共用的機會。 藉由我們設計可以得到的益處有：1.增加硬體資源的使用率，2. 減少對於記憶體的存取以及 3.提升系統的效能。此外我們設計概念可以任意的滿足不同的應用程式的需求。

How to support simultaneous multithreading (SMT) with minimum resource hence becomes a critical research issue. The register file in a microprocessor typically occupies a significant portion of the chip area, and in order to support SMT, each thread will have a copy of register file. That will increase the area overhead. In this thesis, we propose a register file design techniques that can 1. Split a copy of physical register file flexibly into two independent register sets when required, simultaneously operable for two independent threads. 2. Stretch the size of the physical register file arbitrarily, to increase probability of sharing by two threads. Benefits of these designs are: 1. Increased hardware resource utilization. 2. Reduced memory traffic amount. 3. Increased system performance. Moreover, these proposed designs can be arbitrarily mixed as per application need.