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dc.contributor.authorLin, Yen-Hungen_US
dc.contributor.authorBan, Yong-Chanen_US
dc.contributor.authorPan, David Z.en_US
dc.contributor.authorLi, Yih-Langen_US
dc.date.accessioned2017-04-21T06:50:07Z-
dc.date.available2017-04-21T06:50:07Z-
dc.date.issued2011en_US
dc.identifier.isbn978-1-4577-1398-9en_US
dc.identifier.urihttp://hdl.handle.net/11536/134810-
dc.description.abstractThe printed image of a layout that satisfies the double patterning lithograph (DPL) constraints may not have good fidelity if the layout neglects optical proximity correction (OPC). Simultaneously considering DPL and OPC becomes necessary when generating layouts, especially in routing stage. Moreover, one decomposed design with balanced mask density has a lower edge placement error (EPE) than an unbalanced one [6]. This work proposes a comprehensive conflict graph (CCG) to enable detailed routers to simultaneously consider DPL, OPC, and mask density to generate litho-friendly layouts. This work then develops an DPL-aware and OPC-friendly gridless detailed routing (DOPPLER) by applying CCG in a gridless routing model. A density variation threshold annealing-based routing flow is also proposed to prevent DOPPLER from falling into a sub-optimal mask density balance. Compared with existing DPL-aware detailed routing works, DOPPLER demonstrates an average 73.84% of EPE hotspot reduction with a satisfactory mask density at the cost of an average increase of 0.08% wire-length, 15.14% number of stitches, and 77.28% runtime.en_US
dc.language.isoen_USen_US
dc.titleDOPPLER: DPL-aware and OPC-friendly Gridless Detailed Routing with Mask Density Balancingen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2011 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD)en_US
dc.citation.spage283en_US
dc.citation.epage289en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000299009100047en_US
dc.citation.woscount2en_US
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