完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChen, Min-Chengen_US
dc.contributor.authorLin, Chia-Yien_US
dc.contributor.authorChen, Bo-Yuanen_US
dc.contributor.authorLin, Chang-Hsienen_US
dc.contributor.authorHuang, Guo-Weien_US
dc.contributor.authorHuang, Chien-Chaoen_US
dc.contributor.authorHo, ChiaHuaen_US
dc.contributor.authorWang, Tahuien_US
dc.contributor.authorHu, Chenmingen_US
dc.contributor.authorYang, Fu-Liangen_US
dc.date.accessioned2017-04-21T06:50:09Z-
dc.date.available2017-04-21T06:50:09Z-
dc.date.issued2011en_US
dc.identifier.isbn978-1-4577-0505-2en_US
dc.identifier.urihttp://hdl.handle.net/11536/134816-
dc.description.abstractFor the first time, new random telegraph noise behaviors are reported for silicide band gap engineering in advanced nano CMOS technology. Noise current pulses of up to 40% magnitude are observed when Schottky barrier is reduced to 0.2eV. The large contact resistance instability is attributed to barrier modification at Schottky contact interface by positive charge trapping. The prevalence and magnitude of the noise are dependent on the contact size, trap density, trap energy and the silicide Schottky barrier height. In this work, we report a fast monitor methodology to identify the silicide process induced traps in small silicide contacts for 1Xnm CMOS technology.en_US
dc.language.isoen_USen_US
dc.titleSilicide Barrier Engineering Induced Random Telegraph Noise in 1Xnm CMOS Contactsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2011 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000300015300158en_US
dc.citation.woscount0en_US
顯示於類別:會議論文