Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

Abstract

The diode operated in forward-biased condition has been widely used as an effective on-chip ESD protection device at GHz RF and high-speed I/O pads due to the small parasitic loading effect and high ESD robustness in CMOS integrated circuits (ICs). This work presents new ESD protection diodes realized in the octagon, waffle-hollow, and octagon-hollow layout styles to improve the efficiency of ESD current distribution and to reduce the parasitic capacitance. The new ESD protection diodes can achieve smaller parasitic capacitance under the same ESD robustness level as compared to the waffle diode. Therefore, the signal degradation of GHz RF and high-speed transmission can be reduced due to smaller parasitic capacitance from the new proposed diodes.