完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Khoo, I-Hung | en_US |
dc.contributor.author | Reddy, Hari C. | en_US |
dc.contributor.author | Van, Lan-Da | en_US |
dc.contributor.author | Lin, Chin-Teng | en_US |
dc.date.accessioned | 2017-04-21T06:49:31Z | - |
dc.date.available | 2017-04-21T06:49:31Z | - |
dc.date.issued | 2009 | en_US |
dc.identifier.isbn | 978-1-4244-3827-3 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/ISCAS.2009.5117915 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/134988 | - |
dc.description.abstract | Four new 2-D filter VLSI architectures without global broadcast are presented. The first is a transposed systolic structure which requires fewer delay elements compared to the original systolic structure in [1]. By combining the sub-blocks of the original with the new transposed structure, two additional systolic structures are obtained to realize transfer functions with separable denominators, which require fewer multipliers. These separable denominator structures have important symmetry applications. A structure which possesses diagonal symmetry is then shown which requires even fewer multipliers. | en_US |
dc.language.iso | en_US | en_US |
dc.title | 2-D Digital Filter Architectures without Global Broadcast and Some Symmetry Applications | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.doi | 10.1109/ISCAS.2009.5117915 | en_US |
dc.identifier.journal | ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5 | en_US |
dc.citation.spage | 952 | en_US |
dc.citation.epage | + | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000275929800246 | en_US |
dc.citation.woscount | 7 | en_US |
顯示於類別: | 會議論文 |