完整後設資料紀錄
DC 欄位語言
dc.contributor.authorKhoo, I-Hungen_US
dc.contributor.authorReddy, Hari C.en_US
dc.contributor.authorVan, Lan-Daen_US
dc.contributor.authorLin, Chin-Tengen_US
dc.date.accessioned2017-04-21T06:49:31Z-
dc.date.available2017-04-21T06:49:31Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-4244-3827-3en_US
dc.identifier.urihttp://dx.doi.org/10.1109/ISCAS.2009.5117915en_US
dc.identifier.urihttp://hdl.handle.net/11536/134988-
dc.description.abstractFour new 2-D filter VLSI architectures without global broadcast are presented. The first is a transposed systolic structure which requires fewer delay elements compared to the original systolic structure in [1]. By combining the sub-blocks of the original with the new transposed structure, two additional systolic structures are obtained to realize transfer functions with separable denominators, which require fewer multipliers. These separable denominator structures have important symmetry applications. A structure which possesses diagonal symmetry is then shown which requires even fewer multipliers.en_US
dc.language.isoen_USen_US
dc.title2-D Digital Filter Architectures without Global Broadcast and Some Symmetry Applicationsen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/ISCAS.2009.5117915en_US
dc.identifier.journalISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5en_US
dc.citation.spage952en_US
dc.citation.epage+en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000275929800246en_US
dc.citation.woscount7en_US
顯示於類別:會議論文