Title: Overall Operation Considerations for a SONOS-based Memory
Authors: Lee, C. H.
Tu, W. H.
Chong, L. H.
Gu, S. H.
Chen, K. F.
Chen, Y. J.
Hsieh, J. Y.
Huang, I. J.
Zous, N. K.
Han, T. T.
Chen, M. S.
Lu, W. P.
Chen, K. C.
Wang, Tahui
Lu, C. Y.
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
Issue Date: 2009
Abstract: Erase characteristics of a SONOS-based structure are emulated not only for n(+)-poly and p(+)-poly gates but also for TaN-gate+Al2O3 combination. By incorporating our previous studies, performances including program, erase, and read disturb can be reviewed for both SONOS and TANOS devices. Unsurprisingly, it is hard to satisfy all requirements by using a SONOS device. In a TANOS device, an optimal bottom oxide thickness can be specified with the consideration of the three factors simultaneously. Moreover, it is found that conventional extrapolation methodology is inadequate to predict the lifetime of a TANOS device and tends to under-estimate the tolerable read bias.
URI: http://dx.doi.org/10.1109/VTSA.2009.5159334
http://hdl.handle.net/11536/135008
ISBN: 978-1-4244-2784-0
DOI: 10.1109/VTSA.2009.5159334
Journal: PROCEEDINGS OF TECHNICAL PROGRAM: 2009 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS
Begin Page: 150
End Page: +
Appears in Collections:Conferences Paper