標題: A Low-Cost CMOS Integrated Dual-Mode Dual-Slope ADC with Synchronous Rectification Circuit for AC/DC Signal Measuring
作者: Chiang, Cheng-Ta
Ka, Li-Lung
Huang, Yu-Chung
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Analog to Digital Conversion;Dual Mode Dual Slope ADC;Synchronous Rectification
公開日期: 2008
摘要: A lost-cost CMOS integrated dual-mode dual-slope ADC with synchronous rectification circuit for AC/DC signal measuring is newly proposed. Instead of traditional full wave rectifier, an improved synchronous rectifier is implemented. To realize the simplified architecture, we use only one comparator, one OP, and switches. The advantage is that it could not only support wider bandwidth for AC signal measurements from 60 Hz to 100.2 kHz, but also provide DC signals\' digitization. It could be realized by even fewer chip area where by this dual-mode dual-slope ADC is realized in a 0.25-um 1p5m; CMOS technology with a chip area 710 x 630 mu m(2). Simulation results show that ADC achieves 8-bit resolution in DC mode and 7-bit resolution in AC mode with 100 kHz signal bandwidth. Total power consumption is 5 mW
URI: http://dx.doi.org/10.1109/IMTC.2008.4547024
http://hdl.handle.net/11536/135043
ISBN: 978-1-4244-1540-3
ISSN: 1091-5281
DOI: 10.1109/IMTC.2008.4547024
期刊: 2008 IEEE INSTRUMENTATION AND MEASUREMENT TECHNOLOGY CONFERENCE, VOLS 1-5
起始頁: 165
結束頁: +
Appears in Collections:Conferences Paper