完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChiang, Cheng-Taen_US
dc.contributor.authorKa, Li-Lungen_US
dc.contributor.authorHuang, Yu-Chungen_US
dc.date.accessioned2017-04-21T06:49:38Z-
dc.date.available2017-04-21T06:49:38Z-
dc.date.issued2008en_US
dc.identifier.isbn978-1-4244-1540-3en_US
dc.identifier.issn1091-5281en_US
dc.identifier.urihttp://dx.doi.org/10.1109/IMTC.2008.4547024en_US
dc.identifier.urihttp://hdl.handle.net/11536/135043-
dc.description.abstractA lost-cost CMOS integrated dual-mode dual-slope ADC with synchronous rectification circuit for AC/DC signal measuring is newly proposed. Instead of traditional full wave rectifier, an improved synchronous rectifier is implemented. To realize the simplified architecture, we use only one comparator, one OP, and switches. The advantage is that it could not only support wider bandwidth for AC signal measurements from 60 Hz to 100.2 kHz, but also provide DC signals\' digitization. It could be realized by even fewer chip area where by this dual-mode dual-slope ADC is realized in a 0.25-um 1p5m; CMOS technology with a chip area 710 x 630 mu m(2). Simulation results show that ADC achieves 8-bit resolution in DC mode and 7-bit resolution in AC mode with 100 kHz signal bandwidth. Total power consumption is 5 mWen_US
dc.language.isoen_USen_US
dc.subjectAnalog to Digital Conversionen_US
dc.subjectDual Mode Dual Slope ADCen_US
dc.subjectSynchronous Rectificationen_US
dc.titleA Low-Cost CMOS Integrated Dual-Mode Dual-Slope ADC with Synchronous Rectification Circuit for AC/DC Signal Measuringen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/IMTC.2008.4547024en_US
dc.identifier.journal2008 IEEE INSTRUMENTATION AND MEASUREMENT TECHNOLOGY CONFERENCE, VOLS 1-5en_US
dc.citation.spage165en_US
dc.citation.epage+en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000261512100032en_US
dc.citation.woscount0en_US
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