完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChen, SLen_US
dc.contributor.authorKer, MDen_US
dc.date.accessioned2014-12-08T15:18:48Z-
dc.date.available2014-12-08T15:18:48Z-
dc.date.issued2005-07-01en_US
dc.identifier.issn1057-7130en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSII.2005.850409en_US
dc.identifier.urihttp://hdl.handle.net/11536/13511-
dc.description.abstractA new Schmitt trigger circuit, which is implemented by low-voltage devices to receive the high-voltage input signals without gate-oxide reliability problem, is proposed. The new proposed circuit, which can be operated in a 3.3-V signal environment without suffering high-voltage gate-oxide overstress, has been fabricated in a 0.13-mu m 1/2.5-V 1P8M CMOS process. The experimental results have confirmed that the measured transition threshold voltages of the new proposed Schmitt trigger circuit are about 1 and 2.5 V, respectively. The new proposed Schmitt trigger circuit is suitable for mixed-voltage input-output interfaces to receive input signals and reject input noise.en_US
dc.language.isoen_USen_US
dc.subjectgate-oxide reliabilityen_US
dc.subjectinput-output (I/O)en_US
dc.subjectmixed-voltage interfaceen_US
dc.subjectSchmitt triggeren_US
dc.titleA new Schmitt trigger circuit in a 0.13-mu m 1/2.5-V CMOS process to receive 3.3-V input signalsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSII.2005.850409en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFSen_US
dc.citation.volume52en_US
dc.citation.issue7en_US
dc.citation.spage361en_US
dc.citation.epage365en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000230551500001-
dc.citation.woscount17-
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