完整後設資料紀錄
DC 欄位語言
dc.contributor.authorMozsary, Andrasen_US
dc.contributor.authorRodriguez-Vazquez, Angelen_US
dc.contributor.authorChung, Jen-Fengen_US
dc.contributor.authorRoska, Tamasen_US
dc.date.accessioned2017-04-21T06:48:22Z-
dc.date.available2017-04-21T06:48:22Z-
dc.date.issued2006en_US
dc.identifier.isbn978-1-4244-0302-8en_US
dc.identifier.issn1930-8833en_US
dc.identifier.urihttp://hdl.handle.net/11536/135225-
dc.description.abstractTime-to-Digital Converter (TDC) integrated circuit is introduced in this paper. It is based on chain of delay elements composing a regular scalable structure. The scheme is analogous to the sound direction sensitivity nerve system found in Barn Owl. The circuit occupies small silicon area, and its direct mapping from time to position-code makes conversion rates up to 500Msps possible. Specialty of the circuit is the structural and functional symmetry. Therefore the role of START and STOP signals are interchangeable. In other words negative delay is acceptable: The circuit has no dead time problems. These are benefits of the biology model of the auditory scene representation in the bird\'s brain. The prototype chip is implemented in 0.35 mu m CMOS having less than 30ps single-shot resolution in the measurements.en_US
dc.language.isoen_USen_US
dc.titleBio-inspired 0.35 mu m CMOS Time-to-Digital Converter with 29.3ps LSBen_US
dc.typeProceedings Paperen_US
dc.identifier.journalESSCIRC 2006: PROCEEDINGS OF THE 32ND EUROPEAN SOLID-STATE CIRCUITS CONFERENCEen_US
dc.citation.spage170en_US
dc.citation.epage+en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000245212800038en_US
dc.citation.woscount0en_US
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